#ifndef _DE15_ADS129X_H_
#define _DE15_ADS129X_H_

#include "stdint.h"
#include "stm32f1xx_hal.h"
/* Exported includes ---------------------------------------------------------*/

uint8_t ADS129x_ReadOneByte(void);
//#define CS_ADS1298_ONLY (HAL_GPIO_WritePin(GPIOD, GPIO_PIN_15, GPIO_PIN_SET))

#define ADS129x_SELECT_EXT_CLOCK 0
#define	ADS129x_SELECT_INT_CLOCK 0
/*Macro definitions of output in RESET and PWDN pin*/
#define	ADS129x_RESET_ACTIVE				(HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_RESET))
#define	ADS129x_RESET_INACTIVE				(HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET))
#define ADS1294R_PWDN_ACTIVE				(HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET))
#define ADS1294R_PWDN_INACTIVE				(HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET))
#define ADS1298_PWDN_ACTIVE				    (HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET))
#define ADS1298_PWDN_INACTIVE				(HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET))
/*Macro definitions of chip selection*/
#define CS_ADS1294R_ONLY (HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET))
#define CS_ADS1298_ONLY (HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET))
#define CS_ADS129x_BOTH (HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET))
#define CS_ADS129x_NONE (HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET))
/*Macro definitions of Start or stop adc process*/
#define	ADS129x_ADC_START					(HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET))
#define	ADS129x_ADC_STOP					(HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET))
/*read value of ID register for 1294R and 1298 */
#define ADS1294R_ID				(0xD0)
#define ADS1298_ID				(0x92)

/*----------------?????--------------*/
#define OPCODE_WAKEUP             0x02
#define OPCODE_STANDBY            0x04
#define OPCODE_RESET              0x06
#define OPCODE_START              0x08
#define OPCODE_STOP               0x0A
#define OPCODE_RDATAC             0x10
#define OPCODE_SDATAC             0x11
#define OPCODE_RDATA              0x12
#define OPCODE_RREG               0x20//????
#define OPCODE_WREG               0x40//????

/*--------------???????------------*/
#define ADDR_REG_ID               0x00
#define ADDR_REG_CONFIG1          0x01
#define ADDR_REG_CONFIG2          0x02
#define ADDR_REG_CONFIG3          0x03
#define ADDR_REG_LOFF             0x04
#define ADDR_REG_CH1SET           0x05
#define ADDR_REG_CH2SET           0x06
#define ADDR_REG_CH3SET           0x07
#define ADDR_REG_CH4SET           0x08
#define ADDR_REG_CH5SET           0x09	
#define ADDR_REG_CH6SET           0x0A
#define ADDR_REG_CH7SET           0x0B  //????ADS1296R
#define ADDR_REG_CH8SET           0x0C  //????ADS1296R
#define ADDR_REG_RLD_SENSP        0x0D
#define ADDR_REG_RLD_SENSN        0x0E
#define ADDR_REG_LOFF_SENSP       0x0F
#define ADDR_REG_LOFF_SENSN       0x10
#define ADDR_REG_LOFF_FLIP        0x11
#define ADDR_REG_LOFF_STATP       0x12
#define ADDR_REG_LOFF_STATN       0x13
#define ADDR_REG_GPIO             0x14
#define ADDR_REG_PACE             0x15
#define ADDR_REG_RESP             0x16
#define ADDR_REG_CONFIG4          0x17
#define ADDR_REG_WCT1             0x18
#define ADDR_REG_WCT2             0x19





#endif
